A high frequency "divide-by-odd number" CMOS LC injection-locked frequency divider
Abstract
Numerous circuit topologies have been proposed for divide-by-ρ injection-locked frequency dividers (ILFDs), most of which have been optimized for division by even numbers, especially divide-by-2. It has been more difficult to realize division by odd numbers, such as divide-by-3. In this paper we present simulations of an RF CMOS ILFD that can operate equally well in both divide-by-2 and divide-by-3 modes. The ILFD is based on a cross-coupled CMOS LC oscillator with direct injection and an auxiliary injection path. The paper presents two variants of the circuit architecture and Cadence simulations in the multi-GHz frequency range using a standard TSMC 65 nm CMOS process design kit. © 2013 Springer Science+Business Media New York.
Publication Title
Analog Integrated Circuits and Signal Processing
Recommended Citation
Kennedy, M., Awan, M., & Asghar, M. (2013). A high frequency "divide-by-odd number" CMOS LC injection-locked frequency divider. Analog Integrated Circuits and Signal Processing, 77 (3), 415-421. https://doi.org/10.1007/s10470-013-0197-5
