Accurate baseband model for sampling phase-locked loop

Abstract

The sampling phase-locked loop (SPLL) is widely used in frequency synthesis because of its excellent system performance. As in the case of many mixed-signal circuits, the governing equation is an integro-difference equation, which, in general, cannot be separated into a pure differential or a pure difference equation, i.e., it cannot be solved in closed form. The paper develops a non-linear baseband model for the SPLL which takes into account the effects of both nonunifonn sampling and a non-ideal sampling switch. Based on this model, the linear baseband model and proper design equations can be derived. The theoretical results are verified by measurements performed on a 100-MHz frequency synthesiser with a channel spacing of 33.33 kHz. The advantage of the proposed model is that it improves the accuracy and reliability of the circuit design process, thereby improving its efficiency.

Publication Title

IEE Colloquium (Digest)

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