Introduction
Abstract
An All Digital Phase Locked Loop (ADPLL) is an alternative to a traditional Phase Locked Loop (PLL) for implementation in nanoscale digital CMOS, especially as part of a system-on-chip (SoC) [1, 2]. One of the key advantages of ADPLLs over their analog counterparts is that they remove the need for large capacitors within the loop filter by utilizing digital circuits to achieve the desired filtering function.
Publication Title
Analog Circuits and Signal Processing
Recommended Citation
Brandonisio, F., & Kennedy, M. (2014). Introduction. Analog Circuits and Signal Processing, 1-5. https://doi.org/10.1007/978-3-319-03659-5_1
COinS
