Title

BYPASS MULTIVARIABLE KARNAUGH MAPS.

Abstract

A computer aided design program that minimizes logic networks with up to nine variables is presented. The program is written for IBM 360 and 370 Series machines that use the FORTRAN IV G level 20 compiler. It deals with ″combinational″ logic networks, without feedback or memory, that can be implemented with logic gates. Minterm pairs are checked to find prime implicants in the final minimized function. A minimal cover process selects the fewest prime implicants to contain all minterms in the function. Essential prime implicants are always included.

Publication Title

Electronic Design

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