High-Speed Nested Cascaded MASH Digital Delta-Sigma Modulator-Based Divider Controller
Abstract
The MASH Digital Delta-Sigma Modulator (DDSM) based divider controller represents a speed bottleneck in state of the art commercial PLL-based fractional-N frequency synthesizers. As next generation systems require higher phase detector frequencies, there is a need to make ever faster divider controllers. This paper describes a fine-grained nested cascaded MASH DDSM which is significantly faster than state of the art divider controllers, thereby eliminating the current speed bottleneck.
Publication Title
Proceedings - IEEE International Symposium on Circuits and Systems
Recommended Citation
Donnelly, Y., Mo, H., & Kennedy, M. (2018). High-Speed Nested Cascaded MASH Digital Delta-Sigma Modulator-Based Divider Controller. Proceedings - IEEE International Symposium on Circuits and Systems, 2018-May https://doi.org/10.1109/ISCAS.2018.8351624
