Maximizing Cycle Lengths by Architecture Modification
Abstract
In this chapter, we describe deterministic techniques for maximizing the cycle length by changing the architecture (rather than by setting initial conditions and/or input or by adding dither). We modify the conventional MASH DDSM and refer to the new maximum cycle length structure as HK-MASH. First, the modified first-order Error Feedback Modulator (EFM) is described. Then, the modified EFM is utilized in the HK-MASH DDSM. The spectral performance of second, third, and fourth order HK-MASH modulators with small and large accumulator word lengths is studied by simulation.
Publication Title
Analog Circuits and Signal Processing
Recommended Citation
Hosseini, K., & Kennedy, M. (2011). Maximizing Cycle Lengths by Architecture Modification. Analog Circuits and Signal Processing, 95-115. https://doi.org/10.1007/978-1-4614-0094-3_4
